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action or later. Please see Debugging in WordPress for more information. (This message was added in version 6.7.0.) in /home/k1flzv43gfd6/public_html/smartpadforcmp.com/wp-includes/functions.php on line 6114Chemical Mechanical Planarization/Polishing (CMP) was invented by IBM approximately 30 years ago to overcome the challenges in planarization of the semiconductor wafer as better planarization enables smaller chip architecture. The current and next generation architecture demands highly precise polishing on the order of nanometers. Over the last 10 years, the number of CMP processes for the mobile processor increased exponentially due to the complexity of the integration of the semiconductor chips. CMP has become one of the key manufacturing processes to enable faster and more energy efficient semiconductor devices. Yet, CMP pads have not changed much since IBM first introduced the CMP process in 1983. Current state-of-the-art for CMP process consists of polyurethane polishing pads, polishing slurries with abrasive particles and pad conditioners for pad resurfacing.
SMART PAD LLC was founded in 2018 by Dr. Sunghoon Lee and Mr. Goo Youn Kim to commercialize a completely redesigned CMP pad for the semiconductor industry. The base technology has been exclusively licensed from UC Berkeley. Sunghoon Lee (Co-Founder) developed the original pad concept in his Ph. D. program at U.C. Berkeley working under Professor David Dornfeld. Goo Youn Kim (Co-Founder) has held various roles at Dow Chemical including field service engineer for the Samsung account, and product quality engineer and product manager for Chemical Mechanical Planarization pads. These experiences were critical for understanding the needs of the industry and understanding the existing state of the art.
Utilizing technology developed by the co-founders and exclusively licensed from UC Berkeley, SMART PAD is poised to introduce a revolutionary redesign of the CMP pad that will enable chip manufacturers to achieve their targeted CMP goals making sub 5nm devices a reality.
Backed by over 15 years in the semiconductor/CMP industry, the core competency of our team is advanced research capability on micro fabrication, macro-level pad design, and characterization of mechanical and electro-mechanical pad properties.
Currently, SMART PAD is funded by its co-founders and the NSF SBIR Phase I and II.
Today, SMART PAD employs only the two co-founders.
Sunghoon Lee (Co-Founder) developed the original pad concept in his Ph. D. program at U.C. Berkeley working under Professor David Dornfeld. After graduation, he worked for Intel for 10 years as a process development engineer and currently works for Globalfoundries as a senior process engineer. This experience was critical for understanding the needs of the industry. Specific to the commercialization of this technology, Dr. Lee is responsible for research and development on product design, raw materials, polishing tests, and customer engagements.
Goo Youn Kim (Co-Founder) has held various roles at Dow Chemical since 2005, which include: field service engineer for the Samsung account, and product quality engineer and product manager for Chemical Mechanical Planarization pads. He holds a master’s degree in Chemical Mechanical Polishing from Pusan National University in Korea and received an M.B.A. from NYU Stern. Specific to the commercialization of this technology, Mr. Kim is responsible for business planning, finance, quality control, and procurement. He also served as the PI for NSF Phase I and II.
Both Sunghoon Lee and Goo Youn Kim have received Master’s degrees for CMP under Professor Jeong. SMART PAD has an extensive reach into the semiconductor industry given our connection to Professor Jeong’s laboratory alumni as well as our relationships with industry experts through our work experience. Many alumni have worked as R&D engineers at Samsung and SK Hynix. This network will allow us to easily engage with key customers (Intel, Samsung and other consumable suppliers) throughout our product development.
Additional staff will be hired upon investment that include a researcher knowledgeable and experienced in polymer science, and an additional senior engineer experienced in high volume manufacturing and quality control.
February 2019: National Science Foundation Small Business Innovation Research Phase I fund ($225,000) granted.
June 2019: Prototype samples were made, and concept proofing polishing tests were conducted at Clarkson University.
April 2020: National Science Foundation Small Business Innovation Research Phase II fund ($750,000) granted.
May 2020: Participated in U.C. Berkeley SKYDECK incubation program for 6 months.
June 2020: Innovate 518 Hot Spot Certification approved
July 2020: Prototype manufacturing location set up at Cohoes, NY
September 2020: Prototype samples were tested at severe condition tests (20-hour marathon tests) at KITECH in South Korea to validate the possibility of reducing CMP operation cost.
October 2020: The first utility patent about our products was filed
April 2021: Engagement with a key customer started.
June 2021: Engagement with another key customer started.
July 2021: Moved the manufacturing location to Clifton Park, NY
February 2022: National Science Foundation Small Business Innovation Research Phase II supplement fund, Technology Enhancement for Commercial Partnership (TECP, $149,998) granted to enhance the engagement with a key customer.
April 2022: Another key customer conducted initial tests to validate the performance of our products.
June 2022: The second utility patent about our manufacturing process was filed.